Hardware Emulation Engineer

Emulation Engineer

Join an ambitious, experienced team of silicon and distributed systems experts as a hardware emulation engineer. You have the opportunity to build a groundbreaking new category of product that revolutionizes the performance and scalability of next-generation distributed computing systems, and to help solve key infrastructure challenges facing our customers.

We are looking for talented, motivated candidates with experience building comprehensive hardware emulation frameworks and executing emulation test plans for large-scale networking and computing chips, and who are looking to grow in a fast paced, dynamic startup environment. 

Default location is Mountain View, CA, but we are equally open to remote candidates.

Scope

• Collective ownership of emulation build infrastructure.
• Collective ownership of chip level emulation models.
• Collective ownership of tools around build automation, run automation and debug utilities.
• Development and ownership of Github based CI/CD flows for emulation code base.

Roles & Responsibilities

• Technical knowledge and proficiency working with at least one industry-standard HW emulator platform: Palladium, Zebu, Veloce
• Own and maintain emulation infrastructure.
• Own and maintain chip level emulation models for validating different subsystems within a networking chip.
• Work with vendors on hardware and tool issues on a need basis.
• Enhance emulation methodology for robustness, test throughput, portability and debuggability.
• Work cross functional with simulation, firmware and software test team to validate the chip pre-silicon. Support SW test bring up and debug on hardware emulator, collaborate with hardware design team to triage and fix design issues.
• Leverage understanding of simulation based design verification flows to help emulation test-planning and execution.
• Work cross functional with simulation, firmware and software test team to repro failures seen in real silicon on the emulator.

Key Qualifications

• Emulation experience on any of the emulation platforms : Palladium, Zebu or Veloce. 
• Experience with emulation compile flow, wave dump & triggers, waveform debug, running tests.
• Experience writing scripts in Perl or Python.
• Exposure to Makefile, Bazel or other build flows.
• Experience with waveform debug tools such as Verdi/SimVision/Indago.
• Good understanding of Verilog and SystemVerilog RTL design. 
• Exposure to synthesizable SystemVerilog/Verilog code and SVAs.
• Strong communication skills and a team player.
• MS with 5+ years of experience, BS with 7+ years experience.

Preferred Qualifications

• Working knowledge of PCIE, Ethernet, AXI, DDR, etc.
• Working knowledge of UART, SPI, JTAG, QSPI, etc.
• Working knowledge of ARM based processors.
• Exposure to Design Verification and System Verilog, UVM, and C/C++ verification environments. Be able to correlate stimulus between simulation and emulation.

About Us 

Enfabrica is on a mission to revolutionize AI compute systems and infrastructure at scale through the  development of superior-scaling networking silicon and software which we call the Accelerated Compute Fabric. Founded and led by an executive team assembled from first-class semiconductor and distributed systems/software companies throughout the industry, Enfabrica sets themselves apart from other startups with a very strong engineering pedigree, a proven track record of delivering, deploying and scaling products in data center production environments, and significant investor support for our ambitious journey! Together, with their differentiated approach to solving the I/O bottlenecks in distributed AI and accelerated compute clusters, Enfabrica is unleashing the revolution in next-gen computing fabrics.