Lead Engineer – Silicon Validation Tools & Infrastructure (India)

Enfabrica is at the forefront of building cutting edge networking silicon and system software to drive the revolution in AI and accelerated computing infrastructure at scale.

We are seeking a hands-on Team Lead to drive the development of tools, automation, and infrastructure critical to validating high-performance networking ASICs. This role combines technical ownership of validation infrastructure with a functional leadership of our silicon validation team in the India region.

You will architect scalable test environments and automation frameworks while guiding and coordinating validation engineers across projects. This position is ideal for a senior engineer who leads by example, mentors others, and drives execution excellence across both technology and people.

Key Responsibilities

• Design and implement automation frameworks, test benches, and validation infrastructure using Python, C++, and industry-standard tools.
• Build and maintain CI/CD pipelines and regression systems to support scalable and repeatable validation workflows.
• Act as the technical lead for validation tools and infrastructure, enabling cross-site alignment and tool reuse.
• Provide functional leadership for the silicon validation team in the India geo, including task planning, progress tracking, and performance feedback.
• Remain deeply hands-on: develop test content, debug complex system issues, and lead root-cause analysis efforts.
• Collaborate with design, DV, firmware, and software teams to ensure comprehensive test coverage and effective debug strategies.
• Develop and apply debug methodologies using logs, protocol traces, and signal analysis tools.
• Promote a culture of engineering excellence, technical documentation, and continuous improvement.

Qualifications

Education & Experience

• BSc, MSc, or PhD in Electrical or Computer Engineering.
• 7+ years of experience in post-silicon validation in microprocessors, networking, or high-speed interconnect products, with demonstrated ownership of test infrastructure and automation systems.
• 2+ years in a technical leadership or geo/site lead role, combining engineering execution with team coordination.

Required Technical Strengths

• Proficient in Python and C++.
• Proven experience in designing and scaling validation frameworks and automation platforms.
• Solid understanding of one or more of the following protocols: PCIe (Gen5/Gen6), CXL, Ethernet (MAC/PHY), RDMA/RoCE.

Preferred Technical Strengths

• Skilled in lab equipment: oscilloscopes, logic analyzers, protocol analyzers, BER testers.

Leadership & Mentorship

• Strong mentoring skills with the ability to grow junior engineers while delivering on team goals.
• Experienced in managing and aligning geographically distributed engineering efforts.
• Effective communicator across cross-functional teams including architecture, design, and firmware.
• Self-driven, accountable, and thrives in fast-paced, high-impact environments.

Success Metrics

• Innovate and establish scalable, quality-driven, and cost-effective test infrastructure—measured by a leading low ratio of validation workforce to front-end design (Architecture, Design, and Design Verification).
• Continuously improve validation efficiency, coverage, and issue resolutions.
• Deliver validation milestones consistently and on time, with minimal bugs surfacing post-hardware qualification.
• Build a technically strong, self-directed validation team with clear ownership and disciplined execution.

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